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c.b.
Go to the top of the class!!
;)
Ah well, I can live with it. :)
But to answer the question...
Its more to do with the architecture around the CPU than the chip itself I think. Each bank needs to be 64-bit in total to support 64-bit memory addressing I would guess. Whether thats 2 32-bit or 4 16-bit etc. depends on the chipset. (*cough* yes that would make Turbo's answer incorrect :> ). Easy enough to check out specs of Itanium servers (for example) though to check.
> Not jealous at all, just a little bored of him, especially his ability
> to answer questions he knows naff all about and get them totally
> wrong.
uh-huh.
> Not jealous at all, just a little bored of him, especially his ability
> to answer questions he knows naff all about and get them totally
> wrong.
It seems your tagline is correct...as I (yes, me, DW, not you) am with stupid (*points at Whooo!*)
;c)